Staff/Principal Logical Design Engineer

Join Graphcore's Silicon team as a Staff/Principal Logical Design Engineer in Bristol. You'll design micro-architecture specifications and RTL for cutting-edge AI chips, working closely with Physical Design, Verification, and DFT teams. Day-to-day: SystemVerilog or VHDL coding, EDA tool work, block and chip-level validation (linting, synthesis, timing closure, CDC, RDC), and cross-team collaboration across multiple sites.

You'll need strong digital design experience, proficiency in SystemVerilog/VHDL, and knowledge of design flows. Python or Tcl scripting essential.